Maximum Sampling (Receiving) frequency of Arduino ( Analog vs Digital)

Other Hardware Science and Measurement
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Hi everyone:

I am studying Arduino ADC. I learned that the maximum sampling frequency of Arduino ADC ( e.g. Due) is 1M sample per second. However, as Arduino ADC has a 12-bit resolution so I can use an external ADC with a 16-bit for higher resolution.

My question is, what can be the maximum rate at which this Arduino can receive the sample signal from the External ADC? How can I find that?
In the case of Arduino's own ADC, it was 1M sample/Sec. But I don't know what can be the sample rate receiving limit for Arduino if It receives data from external ADC. My knowledge is basic level so I am not able to understand the datasheet.

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It all depends on the interface. For instance SPI can be clocked fast enough for 1MSPS to be plausible on an
84MHz processor, above that sort of rate takes a data-bus and DMA.

The on-board DUE ADC is not very good(*), you want an external one anyway I suggest.

At this kind of sample rate its common to forget that the amount of RAM may be a limiting factor -
what exactly do you want to do?

(*) The Due AVcc is from a switch-mode regulator, so its very noisy and this ruins the analog
performance of the Due.

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Thank you MarkT. I want to measure the frequency response of the analog sensor. Due to the high-resolution requirement ( 16 bit), I am planning to use the external ADC. However, I am not sure what sample rate would I have in case of external ADC ( in terms of Arduino on receiving end ).

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If you intend to choose an external high speed 16-bit ADC with SPI interface, there is the TurboSPI library for the DUE. This library leverages the DMA feature for SPI peripheral:

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Can you clarify your parameters please?

I want to measure the frequency response of the analog sensor.

Which analog sensor?

Your requirement of very high resolution

high-resolution requirement ( 16 bit)

is not compatible with

1M sample per second

Discussion here

For a 16 MHz Arduino the ADC clock is set to 16 MHz/128 = 125 KHz. Each conversion in AVR takes 13 ADC clocks so 125 KHz /13 = 9615 Hz.

High resolution ADC's like this

use Sigma-delta conversion which is a much slower process than the Ardiono's Successive Approximation ADC.

ADS1115 provides 16-bit precision at 860 samples/second over I2C.

The ADS5481 uses a pipeline ADC and can sample to 16 bits at frequencies above 1Mhz - but not AFAIK available as a module.

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You can get pretty fast commodity precision SAR's, like the ADS8885, 18 bit, 400kSPS.

I suspect you're oversimplifying the landscape of ADC design, there are hundreds of hybrid approaches I suspect,
many trade-secret. And modern processes give huge speedups, 14 bit 3GSPS is about the state of the
art I reckon, and 1GSPS for 16 bit, for instance ADS54J60. You don't want to know the price though :slight_smile:
The designs inside these chips will be pulling all sorts of tricks I expect, with pipelining, flash conversion
sigma-delta, laser-trimming, exotic semiconductor materials, etc etc.

Anyway with a high precision ADC running at high sample rates the limiting factor to accuracy
is often clock-jitter. With 16 bit at 1MSPS, you need a jitter below about 30ps rms to avoid
reducing the effective resolution for high frequency input signals.

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