I'm pretty sure I have the mode set correctly, since Mode 2 includes a high idle state and a falling edge capture. And I'm glad I don't need a MOSI wire involved or to include some address transfer.
But as a follow-up, I have some other questions about wiring and timing. Currently, the Clock A wire goes to pin 13 (the SPI clock) and Data A goes to the MISO (pin 12). But I don't know where the chip select should go on the encoder.
Also, I don't know if any of the timing stuff I included makes sense. The clock divider should drop the frequency to 500 kHz. Are the 5 microsecond delays between byte reads necessary in my code?