Push-button switch pull-down resistor interfacing

Hello all,
I am a user of Arduino, and actually speaking I am fond of it.

I have always used a pull-up resistor for interfacing push-button switches, but recently I thought to try pull-down method for the same, OK the interfacing was good.

Why do we use pull-up/down resistor for switches, what happens If we don’t use the pull-up/down resistor ---- OK I googled it and found that there is noise in the circuit which tends to change the digital level of a floating pin (in the switch off position) due to which it can go to high and low automatically, and we use pull-up/down resistor to make the digital levels of the pin (to which the switched is interfaced) definite high or low in both switch on and off state but not floating any time, and I checked it experimently also by interfacing a push-button switch directly without any pull-up/down resistor and saw the result on com-window and found the above problem in reality, and then used the pull-up/down resistor then the problem fixed ------ OK OK OK OK.

Now I want to learn the concept how the pull-down resistor works ?, I am a bit confused, please excuse me If I am going to ask a silly question,

When the switch SW is OFF

fig0 - - attached

then there is no question, the node x is floating and can subject to noise which can lead to a HIGH voltage or LOW voltage whatever on the node x, any current coming from the node x due to noisy voltage appeared on the node x has two paths to go, either go to Rpd or to Rin, as we all know that the input impedance Rin of the uC is very large than Rpd and current always prefers the path of least resistance most of the current goes to Rpd’s path, nothing (or least) goes to Rin and hence it produces least voltage in Rin and so the uC sees level LOW, so the low resistance Rpd always pulls the noisy voltage whatever (HIGH voltage or LOW voltage) appears on the node x (floating) to down (i.e., LOW, the current and hence the voltage made in the Rin will always be LOW) so the uC’s pin will always remained at a definite level LOW. ----- OK OK

But when the switch SW is ON

fig1 - - attached

as we know that the current coming form the Vcc supply (i.e., node x) has again two paths to go, either to Rpd or to Rin, as we all know that the input impedance Rin of the uC is very large than Rpd and current always prefers the path of least resistance most of the current goes to Rpd’s path, nothing (or least) goes to Rin and hence it produces least voltage in Rin and so the uC again sees level LOW.
In both the conditions (switch ON and OFF) the uC’s goes LOW what and why is this happening, or more correctly I should say why not happening (practically), but happening in theory.

It seems that I am forgetting something please let me recall it back, explain the concept and working me in deep.

I am feeling very restless about it so please reply soon………….

Thanks in advance.

fig0.PNG

fig1.PNG

ashisharduino:
It seems that I am forgetting something please let me recall it back, explain the concept and working me in deep.

You sure are.

Rin is so high that you can ignore it. In fact, it is the capacitance of the input pin that is of more concern in circuit design.

The answer to your conundrum is that the current flowing in Rin is only so small because its resistance is so high, so the high resistance trumps the low current. The current is very small, but the resistance is much higher, so V=I*R is big, not small. But it is actually I=V/R; the voltage is the cause, not the effect.

And - if the switch is only to control the Arduino, it is much safer and more reliable to have the switch go to ground, so use pull-ups or the internal pull-ups of the Arduino.

You need to understand MOSFET gates to understand this - the gate is electrically
isolated from the rest of the MOSFET by a thin layer of silicon dioxide (ie glass), so
no current flows at all(*) except a tiny instantaneous charge when the input changes
LOW to HIGH or HIGH to LOW and the capacitor formed by the gate charges up
or discharges. CMOS logic chip MOSFETs have capacitances measured in femtofarads,
orders of magnitude less than the capacitance between metal pins of the chip package.

Just stray voltages on the neighbouring pins have a massive effect on a floating pin,
basically the floating pin follows the changes on nearby pins.

(*) except for leakage currents in the picoamp range, mainly from the protection
diodes.

FET stands for field-effect transistor - the electric field across the gate oxide controls
the conduction in the source drain circuit. No current flow is needed as in a BJT,
so you need to replace that Rin in your diagram with a Cin

This explains it all:-
http://www.thebox.myzen.co.uk/Tutorial/Inputs.html

current always prefers the path of least resistance

No, current always flows down both paths as if the other path was not there.

Grumpy_Mike:
This explains it all:-
Inputs

current always prefers the path of least resistance

No, current always flows down both paths as if the other path was not there.

If I had a time machine.... I would hunt down the first bastard that said "current follows the path of least resistance," and beat some sense into him.