I've redrawn your schematic and rearranged it a little bit, now with annotation at least we know what we're talking about. The first thing I noticed was that you have two 20k resistors in parallel connected to the 10n cap. That's equivalent to a single 10k resistor - this is R6. Likewise the two 100k resistors to 3.3V; those can be replaced by a single 50k (standard values are 47k and 51k) - this is R1.
So let's see if I can figure out how this works. The simulator doesn't show well how it works; it's too fast or too slow or whatever, just not really useful. I can't see what really happens there. I've also given the outputs a sensible name, and of course annotation was added automatically.
So let's say SW1 starts in open state. C1 is charged fully, C2 is discharged. Both Q1 and Q2 are off.
SW1 closes. C1 and C2 are connected forming a voltage divider bringing the connection to about 330 mV. The base of Q1 is pulled to about -3V keeping it firmly off.
At the same time C2 is of course also at 330 mV, base of Q2 at 330 mV and it conducts pulling low the RESET.Very soon C2 runs out of charge, Q2 switches off again, RESET goes high. Both C2 and C1 get charged to 420 mV through the R2/R6 voltage divider. Current flowing in the circuit is the leakage though R2+R6 (40 µA) plus leakage through the transistors.
SW1 opens, now C2 is pulled to GND and the base of Q2 goes negative, holding it firmly off. At the same time C1 is pulled up, the base of Q1 is brought to about 2.9V, it conducts pulling low the RESET until C1 is discharged and Q1 switches off again.
OK, so that's how it should work. Quite neat.
Concerns: in the SW1 making cycle the 330 mV of C2 may not give enough current to really pull low RESET: it is discharged through R6 so about 3.3 µA base current, which (at a gain of 100) is only just enough to pull down the RESET line through Q2.
That current dwindles really quickly, bringing me to the second concern: pulse duration, which will be very short, possibly too short to give a proper reset of your ESP.
In the SW1 breaking cycle Q1 gets even less current as C1 charges through R2. It probably can not properly pull low the RESET line.
The state output does not go to ground, when SW1 is closed it hovers at about 430 mV. Assuming the ESP wants <0.3*Vcc for a low signal (i.e. about 1V) this will be low enough.
Possible improvements: make C1 and C2 equal value, so C1 can do a much better job helping C2 to switch on Q2. Larger values for those two capacitors may be needed to give a long enough pulse.
When testing this circuit, do connect a scope to see the actual pulses you generate, and measure whether the pulse goes low enough for long enough.