I've started using 2 decoupling caps for the AU version, since there's Vcc/GND on 2 opposite sides of the chip. To try to keep them as close to the chip as possible had to run the Aref grounding cap through the one. I guess this is ok. See the photo. The cap on the cap side of the Atmega is a Vcc/gnd decoupling cap, and the cap right above it is the Aref cap that goes to GND. Does this layout look suitable?
thanks.
