A Question for Dickson Charge-Pump Experts (about the 2-phase clock signals)

Hello, all.

Background

I want to build an Arduino-based ATtiny HV programmer shield, using an Arduino-controlled Dickson charge-pump, to generate the "high" 12V supply for the HV programming; something like this design by Wayne Holder. (BTW, I especially like how Mr. Holder incorporated the analogue input feedback to "regulate" the charge pump output to 12 V: if it goes over the threshold, just pause the charge pump clock; when it goes back uner the threshold, just re-start the clock signals.)

But instead of using a timer interrupt service routines in the source code, I would just set up Timer1 in one of the AVR PWM modes (something like as described in this YouTube video by Julian Ilett) and drive the charge-pump clock with Arduino PWM pins 9 and 10. Also, I would be using low-power Schottky diodes instead of the 1N4148 diodes used in Mr. Holder's design.
Most (almost all) Arduino-based Dickson Charge Pumps I have seen "on the web," use a simple 2-phase pulise "180 degrees apart", each with 50% duty cycle (where one pulse rises at the same moment that the other pulse falls).

But referring to the Wikipedia article on charge pumps, it shows an interesting timing diagram for the two-phase clock signals (in red at the bottom of the picture):

(This picture is Courtesy of Spinningspark at Wikipedia and shared under "Creative Commons Attribution-ShareAlike 3.0 Unported.")

The above timing diagram shows a small delay between pulses, where both pulse signals are 0 (i.e. "low" or ground level), for a short time, between one pulse falling and the other phase pulse rising. Mr. Ilett's video addresses this at about 7m and 36s into the video. He incorporated this "non-overlapping" scheme for testing, but found (in that video) that it did not appear to make any difference whether the pulses had the short delay, or not.

Using Timer1 in "phase correct PWM" mode on the Arduino, means that the maximum pulse frequency is only 31.37 KHz - much slower than is normally used in Dickson Charge pump designs (or, so I have read). So, I am wondering if, perhaps, the slower clock signal is the reason why the short pause between pulses does not appear make a difference?

If the short delay betewwn pulses is not needed, I can just set up the timer in "fast PWM" mode at 50% duty cycle (with one of the outputs inverted), and generate the pulse trains at almost double the frequency (62.5 KHz).

Question

So, my big question (for the Dickson Charge Pump "Experts" among you): Does it make any difference (in terms of efficiency, performance or capability) whether or not to add the short pause between pulses? If so, why? What does the addition of the pauses actually do, to make the charge pump operate better? And by how much should the pulse widths be reduced? (I.e. what should be the actual duty cycle of the pulse for each of the two phase signals?

With thanks and best regards,
DuinoSoar.

The delay is presumably intended to increase efficiency by taking into account the diode switching time.

In a given circuit the choice of delay, and whether it will make a significant difference, depends on the properties of the chosen diodes.

LTSpice can simulate that circuit, given appropriate choice of diode models, and there is plenty of technical literature on the subject, e.g. https://ieeexplore.ieee.org/document/9462759

Thanks @jremington .

So the length of the delay is not so much based on the actual pulse widths or duty cycle (i.e. is not a percentage of the pulse period), but is a fixed-length time based on the on-to-off switching time of the diodes, right? Am I understanding it correctly?

Thanks,
DuinoSoar

The best choice delay is obviously circuit-dependent. There are also parasitic capacitances to take into account.

BTW "Dickson" charge pump.

He incorporated this "non-overlapping" scheme for testing, but found (in that video) that it did not appear to make any difference whether the pulses had the short delay, or not.

This is a pretty advanced topic, capable of only a limited (a few percent at best) improvement in efficiency, and so the above result is not surprising.

Yes, that was a typo. I fixed the subject line.

And thanks for your quick replies.

Okay. So given that the actual output voltage is "regulated" down to 12V (from the "nominal" 15V without this "regulation"; by pausing and re-starting the timer based on the A/D input), it probably makes no significant difference whether to use simple 50% duty cycle without the short delays, as opposed to including the delays. (I don't know what the actual current requirements are for the (say) ATtiny85 reset input at 12V, but I imagine it is pretty low.)

So, it seems it might be better to use the faster pulse frequency (using the timer's "fast PWM" mode), without the short delay between pulses, than to use the slower pulse frequency with the short delay.

The clock drivers have to supply the current to charge the capacitors. It's a good idea to add current limiting series resistors to the clock outputs. The result is a RC low pass filter that affects the time to fully load the capacitors. At the same time the achievable output current is a fraction of the average clock current.

Not a charge pump expert by any means, but I suspect the delay is there to mitigate the slow recovery time of regular P-N junction rectifier diodes. When bias is reversed, they can stay on for a non-trivial period, and significant current can flow backwards before they shut down. But your Schottkys wouldn't have that problem. For that matter, neither would the 1N4148, which recovers very fast.

Perhaps, but what it also does is to limit the driving current by halving the instantaneous transfer of charge into the capacitors as per also @DrDiettrich's concerns.

Thank you for your comment, @Paul_B , but I do not think I fully understand how adding the delays between pulses help to:

Can you elaborate on this, please? Is it because of the momentary conductivity of the diodes just before they switch off?

Thanks and best regards,
DuinoSoar.

I previously wrote:

But it turns out that I can "have my cake, and eat it, too!". I had not previously noticed the implications of one of the Timer1 PWM modes: PWM, phase correct, with ICR1 as "TOP". In this mode, ICR1 ("Input Capture Register 1") is especially re-purposed to set a "TOP" value for the Timer1 period. In this timer mode, with ICR1 set to some value, the timer has a shorter total period, or higher frequency. (I had previously thought that I had to use 8-bit, PWM, phase correct mode, with a "TOP" value fixed at 255.)

With ICR1 set to 128 and clock select set to 1 (divide by 1), the total timer period would be (256/16) µS = 16 µS (so the frequency of the pulses would be (16/256) MHz = 62.5 KHz - just like in Fast PWM mode. And both OCR1A and OCR1B are still available to define the pulse widths (with output B in "inverted" mode).

So using these timer and output-bit modes, with ICR1 ("TOP") set to 128, OCR1A set to 56, and OCR1B set to 72, the width of the positive pulses should be 7 µS, and the delay between the falling edge of one pulse and the rising edge of the next (opposite phase) pulse should be 1 µS. (The off-time of each individual pulse signal should be 9 µS.)

I am assuming that 1 µS is long enough for the Schottky diodes to finish switching and for any parasitic capacitance. I plan to use 0.2 µF ceramic capacitors for the three charge pump capacitors, and a 4.7 µF alumin(i)um electrolytic for the output filter capacitor. (Note the extra 'i' for you folks on the other side of "the pond." :wink: )

Per Wayne Holder's original design, I will use a 100 KOhm + 510 KOhm voltage divider to feed-back the charge pump supply output, into the Arduino A0 analogue input, to regulate the charge pump output to 12 V. I will also incorporate the shunting transistor to quickly discharge the output filter capacitor during shut-down. (Otherwise, the cap would take some 3 seconds to discharge through the 610 KOhm voltage divider).

Does this seem like a sound design?

Thanks and best regards,
DuinoSoar.

Your conclusions are almost correct.

Fast PWM mode doubles the frequency because the timer only counts up. But Phase Correct PWM mode lets you choose any gap between the pulses in 4/16 µs steps.

How do you finally want to modify the output voltage?

No, it is because you change the voltage applied to the capacitor in two separate steps, so each step involves half the voltage and therefore half the transient current to charge the capacitor(s). The charging current has mostly settled by the time the second step occurs.

Yes, I understood that. I meant that, with the setup I described, the resulting overall timer frequency (62.5 KHz) is just as though the timer had been put into fast PWM mode, instead of phase-correct mode (with ICR1 as TOP and set to 128). BTW, the smaller counts mean that a little bit of resolution is lost in setting the pulse width timings, but still should be okay.

I am not sure I understand your question, Dr. As mentioned, I would use the voltage divider to feed back to analogue input A0. For the 100K + 510K divider, the 12 V would be divided down to 12 * 1/(6.1) ~= 1.97 V input to the A/D converter (with 5V reference), so this would translate to an A/D value of about 403 (nominal; but I would manually measure it and set it to the correct value before "hard-coding" it, due to resistor tolerances). So while the charge pump is running, if the A/D result goes over the threshold, the timer input clock source would simply be set to 0 to momentarily pause the pulses, then when the voltage subsequently falls below the threshold, the timer would be resumed by setting the clock source back to 1 (for the divide-by-1 input).

Perhaps in the final version of the programmer circuit, I may use a trim-pot into another A/D input, to manually adjust the output voltage, from time to time (as components age and change values); or maybe use serial port commands to adjust the A/D threshold, and save it into the ATmega EEPROM.

Is that what you were asking about?

From the Reference manual:

As the 12V has a +/- 0.5 Volt range, the uC sketch only needs to verify in setup() an appropriate range and then forget about monitoring the HV.

Looks like a Duracell MN27 would work for a number of operations:

Thank you for your comment, @mrburnette .

But the whole point of this exercise is is to just use the Arduino and a few capacitors and diodes to supply the 12 V, by implementing a Dickson charge pump, without requiring a battery, boost converter, or any other external or independent 12 V supply.

Since the 3 stage charge-pump would supply a nominal 15 V output (before losses), the reason for the A/D feedback monitoring is to regulate it down to 12 V (by pausing and restarting the Dickson phased clock signals as required). If the losses due to forward diode drops and other inefficiencies prove to be too much to reliably supply the 12V, I am thinking that adding a fourth stage (an extra diode and capacitor) may help (but not so sure about that).

Thanks and regards,
DuinoSoar

Okay.

As an EE, I understand playing with theory: I don't regret the time I spent in the 1960s with a Ungar soldering pencil. Even today, I love to take a few parts on the bench and bend then into something functional.

But IMO, unless you are going to build this programmer for sale or construct numerous ones for a club, such hypothetical vetting in a forum provides a number of potential solutions but nothing bench-tested and confirmed. Simulation as jremington stated is a good option for vetting "suspicions" if ones workbench does not have physical oscilloscope and signal sources and measurement instrumentation.

While this post has a "solution"; do you really have the answer?

My personal preference for closing a post is one or more of:

  1. code,
  2. formal URL to a respected source,
  3. bench tests with testing methodology stated (for replication.)

Ray

Interesting project.

Overall, I have to say that your goals are possible, but in the long run, the most reliable HV programmer that I've achieved is more of an adapter that converts any existing UPDI programmer into a HV programmer (Updi-Key).

In your project, the most critical part is the characteristics of the pulse ... it needs to be fast and switched in/out of the UPDI cleanly with high isolation when off (the UPDI line is sensitive) . Surprisingly, the duration of the HV pulse should be faster than published (about 25us). This is what is used in the ATMEL Power Debugger.

Anyways, I've been down this route with the Dickson Charge Pump . You can find code here that on an AVR runs the charge pump at 413kHz c/w deadtime between pulses. Here's the HV programmer page for the Arduino Nano

I'm not making any products, nor will be (lost out on a large order for equipment they failed to ship when COVID started).

Everything's open-source, so take a close look and use what you can.

Good luck with your project!

OP didn't say whether it was a UPDI programmer (which requires a relatively short pulse), or a more traditional HV Serial (or even parallel) programmer (which usually require 12V for the entire programming time.)

There are a lot of "more technical" articles that google finds about Dickson charge pumps than the Wikipedia article, like https://research.ku.ac.th/kur3upload/Present/PRAbs510153_580403234910_e1854dcb-6413-49c8-a2c2-fc0a2a5c194c.pdf

It looks to me like the "dead time" serves the same purpose as it does in, say, H-bridge circuits for motor drives. It prevents momentary "short circuits" in the driver MOSFETs - those are push-pull drivers, and if both MOSFETS were "on" at the same time due to, say, switching delays caused by gate capacitance, there would be significant wasted power (and possibly damaged mosfets.