Hi sir,
I have to Debounce the I/O pin inside the External Interrupt routine. How to do this? Kindly let us know.
Why do you have to do that? That would be a very unusual way to do it!
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Hi sir,
Thanks for the reply.
what i have to do is:
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If the Debounce Reg = 0x00. When the External interrupt triggers, it will have to go to the External interrupt routine within 3 clock cycle and have to Switch ON the Output Pin.
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If the Debounce Reg = 0xFF. When the External Interrupt triggers, it have to check the External Interrupt I/O pin for the debounce time which is set in the Debounce Reg, then i have to Switch ON the Output Pin.
How to do this Sir.? Kindly let us know.
Looks like a xy-Problem. Please tell us what you really want to do - independent from a software solution.
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Hello prakashvenugopal
Post your sketch, well formated, with well-tempered comments and in so called
code tags "< code >" and schematic to see how we can help.
Have a nice day and enjoy coding in C++.
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Debouncing and interrupts are not used together.
Interrupts are used when you need to immediately respond to an event. Debouncing is the introduction of a response delay in order for the signal to stabilize. Obviously one contradicts the other.
If you want to use debounce, then you do not need an interrupts, use polling
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Well, you could use an interrupt to start/trigger the debounce process - but, indeed, you wouldn't do the actual debouncing within the ISR
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Hi sir. Thanks for the reply. If the debounce reg = 0x00. I have to trigger the output inside the External interrupt within 3 clock cycle. This can not be achieved while polling that pin. So for this purpose i need a external interrupt. When the debounce reg is other than 0, it have to work as normal polling with that debounce reg. How to do this?
Hi sir, it is just a variable register declared as BYTE.
Yes. If the External interrupt triggers, it will go to the ISR routine. I have to start the debouncing process. I understood that we can not do the debouncing process inside the ISR. I have to disable External interrupt inside the ISR when it start/trigger the debounce process? Otherwise it will goes to external interrupt routine continuously?
If the debounce reg=0×00, when the external interrupt triggers, it will switch ON the output pin within 3 clock cycle.
If the debounce reg=0×ff, (other than Zero), when the external interrupt triggers, i will start the debouncing process in the timer interrupt. Disable the External interrupt inside the ISR routine.
When the debounce process is over, can i Enable the External interrupt?
To be clear:
When the debounce reg = 0x00, the pin should work for External interrupt trigger.
When the debounce reg=0xff, (other than zero), the pin should used as normal pin. Will have to check for polling the debounce.
You don't mention which microcontroller and I don't have access to datasheets at this moment but I don't think 3 clock cycles is feasible on AVR (from your previous topics I suspect that this is about a 328PB or 2560). When an ISR is triggered, certain data will be saved; it will be restored when the ISR ends.
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You don't mention which microcontroller and I don't have access to datasheets at this moment but I don't think 3 clock cycles is feasible on AVR (from your previous topics I suspect that this is about a 328PB or 2560). When an ISR is triggered, certain data will be saved; it will be restored when the ISR ends.
Hi sir,Thanks for the reply. it is ATmega2560. It will take less than or equal three clock cycle to enter into the External Interrupt routine after the External interrupt triggered. For triggering that Output Pin, it will take another two clock cycles i think.
Kindly refer the Page number: 110
ATmega640-1280-1281-2560-2561-Datasheet-DS40002211A.pdf (4.7 MB)
Hi sir, The "debounce register" i mentioned is just a userdefine variable. It is not any Special Function Register.
I think your expectations are too high.
At the bottom of
there is an analysis of the timing behavior on an UNO.
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That is what I was pointing at in post #13.
Thanks for that link.
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Software debounce requires 2+ ms of on and off bounce followed by a period of ms pin state stability to determine. Interrupt code MUST run quickly like store micros() and set a flag quickly.
People who write blocking code use interrupts to get around blocking at a price.
Learn this, save interrupts for micros-close timing.
This is time well spent! It is what's behind tasking with no OS, on a single thread in void loop().
With non-blocking code, reading a pin 50 times a millisecond is possible with room to do something about it or run say a status blinker and another sensor and a serial monitor reporting events and taking commands. Still reasonable. That is what the do many things at once gives. Next step is state machines.. a power tool for coding! Be ready!
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Hi sir, Thanks for the reply. I thought 3 to 4 Clock cycles is enough to enter the ISR routine. From the Data, it will take 82 clock cycle x 62.5 nsec = 5 usec approx. with 16 Mhz Crystal to enter and leaving the External interrupt routine without code logic inside the routine.
I refer this link for 4 clock cycle is enough:
HI.
What are you debouncing?
That is indeed the case
So now you understand why post #13 and post #18 were questioning the feasibility 
If you need it to be within 3 cycles (187.5 ns) or so, you will need either a faster processor (I have no idea which one, all of them will save some context before executing the user code) or implement part of your solution in hardware.
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debounce takes over 100 times as long as any interrupt should.
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