DSI video on mipi port

Hi,
I would like to know how hard could be to implement a dsi transmitter or receiver in the MIPI port to transmit/receive video signal from other source/sink like a DSI display or the display port of the raspberry pi as source for example.

It seems the pinout it's compatible but the needed logic to make it works...

searching on internet the only source for dsi I found is and DSI tx running on xilinx FPGA:

GitHub - daveshah1/DSITx: MIPI DSI transmitter core for Xilinx FPGAs (work in progress).

but it's for a 4 lane display and with some IPs from xilinx so needs to rewrite some code.

for Rx just proprietary IPs and no idea how implement it.It's the same protocol that for image sensors?.

I don't know much about DSI, but are the pin connections the same for the two?

The FPGA is restricted to two lane MIPI-CSI only unfortunately. The other pins for 4 lane are not connected, not sure why. The same goes for the Raspberry Pi.

One thing to keep in mind is that they've lobotomized the MIPI-CSI rx. It's supposed to have low speed and high speed receiver circuitry to meet the D-PHY standard, but it doesn't, only the high speed is there. You might need the low speed driver to properly signal to the DSI sink that you're starting a video period.

thanks @purisame,

didn’t knew about the low speed, I’ve read about the DSI in raspberry is a little bit special but no idea why.

Electrically there is difference between camera CSI and DSI interface the pins signals have different positions as you can see in the schematics attached(the first is the raspberry pi DSI and CSI interfaces and the other is for the MKR vidor 4000 camera interface).

Besides the pin order that is moved for pin data and clock and I2C signals there is one problem with the pins number 13 and 14 that are connected to ground and 3V3 respectively while in the MKRvidor are connected to FPGA pins with pull-up resistor network.

You can simulate the ground and the 3V3 source if you set the FPGA pins to 0 and 1 logic?. if yes the interface should be compatible I guess…

regarding a DSI input the MIPI PHY IP core from intell says:

“The D-PHY is a popular MIPI physical layer standard for Camera Serial Interface (CSI-2) and Display Serial Interface (DSI) protocols”.

Also lattice semiconductors sells the same IP core for both standards. so I guess they are electrically compatible.

https://www.latticesemi.com/en/Products/DesignSoftwareAndIP/IntellectualProperty/IPCore/IPCores04/CSI2DSIDPHYReceiver

Screenshot from 2020-05-08 09-59-19.png