Fastest feasible I2S sample rate of Arduino® Nano ESP32

Projects General Guidance
1

Has anyone successfully used any Arduino product to get a I2S transmitted/received sample rate of at least 44.1kHz? Ideally I would like to run a 24MHz BCk with a 192kHz word select on the receiver, buffer this signal by a very short delay, and re output it via the transmitter. I was hoping I could use a cheap microcontroller instead of trying to learn how to use an expensive FPGA.

2

That's new. Can You explain so we can study it?

3

I2S is type of serial bus interface standard commonly used for connecting digital audio devices together. I can't really explain it any better then Wikipedia so here is a link: I²S - Wikipedia

Here is some documentation provided by Arduino for it's implementation
https://docs.arduino.cc/learn/built-in-libraries/i2s/
https://docs.arduino.cc/tutorials/generic/I2s-library-examples/

For my purposes I will probably be using this library instead:

This little project is a small part of a larger project I am working on. The full scope is
I am trying to measure the THD+N Ratio of an analog signal that is less then -117dB. That is less then the amount of distortion produced by the most performant ADC's in the world. To be able to out measure your measurement device we need to do some mixed signal magic. The first step is split your original sine tone into two buffered sine tones with an analog front end. Convert one of the analog buffered sine tones to an I2S data stream using the best ADC in the world (ES9422PRO). Send the I2S data to an FPGA or hopefully Arduino to store the data over a defined delay period of time. Re-output the I2S data path to the best performing DAC in the world (ES9039PRO in mono mode). Now you should have a faithful representation of the original signal that you can control the phase of. Adjust the digital delay such that the DAC output is 180 degrees out of phase with the original signal. Add the DAC output and second buffered ADC signal to cancel the fundamental tone and gain the signal above the noise floor of the ADC. From here you can cobble together a calculated value of full scale THD+N ratio.

4 
  // Configure for I2S output
  static const i2s_config_t i2s_config = 
  {
        .mode = (i2s_mode_t) (I2S_MODE_MASTER | I2S_MODE_TX),
        .sample_rate = 44100, 
        .bits_per_sample = (i2s_bits_per_sample_t) 16,
        .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,

That snippet sets up an ESP32 to route DAC output to an external 16-bit I2S DAC for stereo audio. It's for a custom car stereo I built a few years ago.

So, yes :slight_smile:

5

Interesting project but it like a chain which is only as strong as its weakest link. The I2C can only run reliably as fast as the slowest unit.

6

Sorry but we are talking about I2S here, not I2C.

1 Like
7

appreciate you sharing your experience, just bought one to try it out!

8

Sorry I am having a hard time reading the screen. Time for bigger print.

1 Like
9

This topic was automatically closed 180 days after the last reply. New replies are no longer allowed.