Hello everyone. I'm reaserching for a solution to generate pulse with TIMER of a MEGA2560.
In order to explain better what i want you can see the image below.
I have the dotted line that is a square wave that I have in an input and each time I have the rising edge there is an interrupt in which I impose TCNT1 = 0 and the OCR1A. The pulses can move thanks a variable Beta that is the value of a potentiometer in an analog input.
Every pulse has a duration of 500us and there is a rising edge each 20ms.
In the image you can see the starting condition and the final one.
Now the question is: How can I manage the pulse number 4 in order to shift it expecially when the pulse is superimposed on the rising edge of the dotted line?
Ps: sorry for the bad quality of the photo
I hope that my question is clear. If not I will give you more informations.
Thanks
Ok sorry for the missing important detail. I can use only one timer because i have a three phase system and the other two timers are using for the other two phases and i have to generate identical pulses also for the other two phases
But the Timer0 is used by the function millis() or i'm wrong? And if I use this timer I will use the instruction "TCNT0 = 0". Furthermore I will implement a PID and the use of millis() is fundamental.
I have for each phase 4 pulses and it is necessary that these 4 pulses are generated when there is the rising edge. In particular if I have the R,S and T phase i have to generate the 4 pulses when there is the rising edge of R. So i need one timer for each phase i think. I would like to understand if there is a way to manage the pulse when it is superimposed the rising edge
An idea that I though is to use the TIMER5. In particular, when i generate the falling edge of the pulse number 3 I set a flag (for example XR = 1) and start TIMER5 and imposing OCR5A= 5666 (5666 because between 3 and 4 there are 60 degrees, using a prescaler of 8).
In interrupt of TIMER5 I generate the pulse number 4. Now, since the fourth pulse of each phase occours 120 degrees from each other, I use the TIMER5 with the same mode
Back to the drawing you provided, I see four short pulses (1, 2, 3 and 4). I assume these are the 500 usec pulses you talk about. You also have the a timeline from 0 to 20 ms so my guess is all the four pulses fall within this time frame.
So my question is, are pulses 1,2,3,4 ever going to collide with each other or they are always some distance/time from each other (doesn't matter the sequence, you can fix that in software)? This will determine whether you need four independent timers or you can get away with a single timer...
Everything is doable then with a single 16-bit timer. You can use CTC mode with TOP OCRA. You then use the COMPB and COMPC interrupts to generate the rising and falling edge of your 500 usec pulses.
COMPB interrupt for the rising edge, and COMPC for the falling edge. Also during COMPC ISR, you then set the next value of COMPB and COMPC, and so on.
Your drawing shows pulses within the 0 to 20ms line. Or the 20ms only covers the dotted area? In that case, you should change the drawing to show that clearly
There's pulses coming from something that's 3-phase, your timings mentioned earlier seem to indicate a 60Hz system, however the 20ms duration indicates a 50Hz system.
What are you trying to accomplish ... determine phase sequence, phase shift, control 3-phase SSR, other???
Is synchronization of the pulses to a 3-phase source important?
One way to do it: not use the timer to set the output directly, but to trigger an interrupt when it reaches the compare value. In the interrupt routine you set the pin high for the required time and do the "bookkeeping".
Keep a status register:
0: all pulses done,
1: before pulse 1
2: before pulse 2
3: before pulse 3
4: before pulse 4
5: before late pulse 4, when the next trigger has already arrived.
and a TMP register that stores the timer value for pulse 1 in case of a late pulse 4
The external interrupt routine:
if status 0: start the timer, set OCR2A = "beta" (the timer value that corresponds to time period beta), set status=1
if status 4: set TMP= "Beta" minus the remaining time on the timer ( OCR2A- TCNT2), that gives you the time between late pulse 4 and the next pulse 1), set status=5
The timer interrupt routine:
set the pin high for 500us (you can do it in assembler and add the necessary NOP instructions to get 500 usec), and
if status 1, set OCR2A for 3.33 ms, set status =2
if status 2, set OCR2A for 6.66 ms, set status = 3
..
ISR(TIMER3_COMPA_vect)
{
// end of 20ms cycle, set OCR3B and OCR3C with new values for the next pulse
OCR3B = 6000;
OCR3C = 6000 + 1000;
}
ISR(TIMER3_COMPB_vect)
{
// set output HIGH
}
ISR(TIMER3_COMPC_vect)
{
// set output LOW
// configure OCR3B and OCR3C with new values for the next pulse
OCR3B = 12000;
OCR3C = 12000 + 1000;
// ... and so on
}
void setup_master_timer(void)
{
/***********************************
set up TIM3
CTC with TOP at OCR3A
***********************************/
/*************
TIMER3
*************/
TCCR3A = 0<<WGM31 | 0<<WGM30;
TCCR3B = 0<<WGM33 | 1<<WGM32;
// 50Hz at 2MHz counter (16MHz DIV8)
OCR3A = 40000 - 1;
// enable all output compare interrupts
TIMSK3 = 1<<OCIE3C | 1<<OCIE3B | 1<<OCIE3A;
// assuming pulse1 starts 3ms from rising edge, generate 500usec pulse
OCR3B = 6000;
OCR3C = 6000 + 1000;
TCNT3 = 0;
// start TIM3 at 2MHz (DIV8)
TCCR3B = 0<<WGM33 | 1<<WGM32 | 0<<CS32 | 1<<CS31 | 0<<CS30;
}
You use the CTC feature to change the values of OCR3B and OCR3C to point to the next pulse. Since you only require a 500 usec pulse, the distance between OCR3B and OCR3C interrupt is constant. In my example, running the TIM3 at 2MHz (16MHz pre-scaled to 8), OCR3C is always 1000 clocks after OCR3B. You modify these values in the OCR3C ISR. You basically re-triggering OCR3B and OCR3C multiple times within the 20ms period.
The system Is 3 phase and the pulses control a 3 phase rectifier SCR. The dotted line in figure is a square wave (basically the sine wave transformed in square)
Thanks ... still confused by the 20ms period and the periods shown in post #10 (seems like these are for 60Hz system).
Your critical situation you want to manage seems to be when instant 2 cycles back to instant 0 ... or does it? If the system frequency is 60Hz, wouldn't this be at 16.667ms rather than 20ms?
Could sync be accomplished via opto-isolated zero-cross detection?