How does bootstrap circuit work for half-bridge mosfet driver?

I am trying to understand what the external bootstrap circuit is used for on this MOSFET half-bridge driver. https://www.diodes.com/assets/Datasheets/DGD2304.pdf

I have read various descriptions online (https://www.ti.com/lit/an/slua887/slua887.pdf?ts=1662792809162) about how it supplies bias to the high-side FET but I cannot see why you would want this applied on startup. It talks about this circuit turning on the low side then the high side FETS seemingly automatically. Normally one would start the circuit with the two inputs (HIN and LIN) low so that neither of the outputs (HO and LO) are high and both FETS are off. Then, by driving HIN and LIN in sequence you can turn the high FET and low FET of an on as required to drive your motor.

Why is the Bootstrap circuit required?
Why is the automatic turning on of the high Fet then the low FET necessary apparently without any driving of the HIN or LIN pins?
What is the purpose of the diode in the bootstrap circuit?
Would I still need this bootstrap if the high FET was a P and the bottom FET an N?
Would I still need a bootstrap circuit if I used a couple of BC548 BJT (or other generic) transistors to drive the Fets?

To keep the bootstrap supply capacitor charged.

Would I still need this bootstrap if the high FET was a P and the bottom FET an N?

No. But this IC wouldn't work with it as the drive polarity would be opposite.

Would I still need a bootstrap circuit if I used a couple of BC548 BJT (or other generic) transistors to drive the Fets?

Yes.

Why is the Bootstrap circuit required?

Because the gate voltage is positive to turn on an N FET, if no bootstrap there is no voltage greater than the load supply available to provide that.

Why is the automatic turning on of the high Fet then the low FET necessary apparently without any driving of the HIN or LIN pins?

I don't know what you mean.

Because the gate voltage is positive to turn on an N FET, if no bootstrap there is no voltage greater than the load supply available to provide that.

Maybe I have it wrong but I thought that I would supply the voltage across HS and HB that I would drive the gates of the FETS. i.e. VDD and Comm would be supplied a voltage to power the Driver IC wherease the voltage provided across HS & HB would be used to drive the gates of the FETS. This voltage across HS & HB would keep the capacitor charged.

I don't know what you mean.

On page 2 of the TI document https://www.ti.com/lit/an/slua887/slua887.pdf?ts=1662792809162 they have Figure 1 and 2 apparently showing the turning on and off of the Hi and low side FETS in sequence or have I read it wrong?

You interpret it wrong. It actually only demonstrates the internal interlock that prevents you from turning on both FETS simultaneously.

The sequence is not dictated by the IC, it's a choice of the system designer.

Taken literally, you certainly do have it wrong. The whole point of all that IC circuitry ("functional block diagram") is to do that.

It's not that mysterious. When the low side FET is on, it completes a circuit from the IC supply through the diode and capacitor to ground. This charges the capacitor to the IC supply voltage minus the diode voltage drop.

This topic was automatically closed 180 days after the last reply. New replies are no longer allowed.