It seems OP prefers a Mickey Mouse solution over adding a 10 cent NPN transistor.
Good luck.
Leo..
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You have been sardonic towards me in the past and I expect nothing less now.
Adding an additional component decreases system MTBF and increases Vcc loading.
Mickey Mouse prefers an engineering approach to problem solving.
I realize there is some resistance to TI's interpretation of their own datasheets. That is something I cannot fix.
A non-logic P-channel fet with it's source connected to 12volt expects ≤ 2volt or 12volt at the gate to fully turn on/off.
You expect it to work with levels of 7.2volt and 9.32volt.
Not every fet is made equal, so good luck with that.
I don't have problems with back-feeding clamping currents into the PCF.
I just think a 2.12 volt swing of the gate is going to work poorly for a non-logic fet.
Again, good luck (from an EE with 60+ years experience).
Leo..
1 Like
As I previously mentioned the TI forums are no different from this forum.
You have to read the entire application report not just one paragraph. You also need to read and understand the entire datasheet.
From SZZA036C:
The Recommended Operating Conditions section of the data sheet sets the conditions for which Texas Instruments specifies device operation (see Figure 11). These are the conditions that the application circuit should provide to the device in order for it to function as intended. The limits for items that appear in this section are used as test conditions for the limits that appear in the Electrical Characteristics, Timing Requirements, Switching Characteristics, and Operating Conditions sections.
To summarize:
My interpretation of Iok is the maximum allowable current through the clamping diodes.
Less than that (15% of the max) should be a safe operating condition.
If you disagree, please share your interpretation of Iok. Surely, Iok is not a useless parameter.
You seem to be driving the fet with an output of the PCF,
so the output clamp current matters, which is 20mA.
No worries there.
But as said, the limited voltage swing at the gate will not make your design fly.
Leo..
I understand your concern. It appears that the spread between Vgate ON and Vgate off varies dramatically with load current.
I hate to put all my trust in Circuit-lab.com but here is what I got.
It seems you're designing with a decent dose of luck, which a good designer would never do.
Leo..
I got similar results on LTspice using an IRF5640. This loading effect on gate requirements could explain a lot of spurious mosfet complaints.
Guess I am just lucky. 
It also depends if you've bought that fet from a genuine distributer or from a source like Ali/eBay/Amazon etc. who sell mostly fakes/rejects from the far east.
What you're trying to do is not good practice when switching 4.8Amp.
Why din't you use a logic-level N-channel fet.
Leo..
I agree. I am not trying to switch 4.8 amps. My load would be 60ma or less.
Then why is R3 2.5 Ohm.
Why use an IRF5640 for 60mA.
Leo..
Under what conditions?
Are you referring to an ESD event?
You obviously did not read the entire data sheet and seem to be fixated on iok for some reason.
For anyone wondering how to do it the right way, use a circuit like this.
Or just the 2N7000 if the 60mA load can be high-side (between 12volt and drain).
Leo..
Nice but the opposite of what I require. Q1 must be off on PCF8574 default start up of 5v output. Do we need yet another component?
Maybe
What other requirements do you have?
Can the components be SMD?
Yes, you need another component anyway to switch 12volt with a non- logic level P-channel fet with 5volt logic. An opto coupler seems the best way. Opto Led/resistor between 5volt and PCF output. Opto transistor between gate and fet ground. Gate pull up resistor between gate and 12 volt.
Leo..
Hi Wawa,
May I ask you to draw up a sketch of what this circuit would look like with the PCF8574 + opto coupler solution so I can better understand it myself.
Regards,
Tyler
Why do you need to use a PCF8574?
There are much simpler solutions.
Before we start redesigning a circuit that I believe is valid, let us see what the TI design team has to say. You can follow along via the link in post 6.
If a redesign is necessary, so be it and I will stand corrected.