Call me a bit clueless... but I don't understand why your board is as orderly elsewhere in terms of voltage paths and as dis-orderly around the IC? Here is what I would consider:
1) It is a bit weird to have very thin power supply lines coming to the IC and then going fat and then going thin again. If your power requirements are such that you need a fat line, stay consistent.
2) I would consider putting in a small decoupling cap in addition to the larger storage caps on the supply and the output to reduce ripple (0.1uF 50V ceramic, for example).
3) A diagram of connections would be helpful, as well as a link to the datasheet.
4) Try to intersect the power lines at better angles - sharp corners (i.e. two lines coming in at an angle less than 45*) create an opportunity for issues with the etching of the board. Perhaps not an issue when the paths are as wide as they are here, but it's good design practice not to do it, period.
5) Consider using +5VDC or whatever voltage planes instead of individual conductor paths to each component. Use the same tool (polygon) as for the GND plane but designate the positive voltage plane as one with a higher precedence than the GND plane. Then programs like Eagle will automagically put a small trench around it.