# Confused about caps and ICs

I'm trying to get my head around decoupling / bypass capacitors and am drowning in theory.
I get that they're important, but I've also read that it's not worth getting too strssed about the detail.
Does the following make sense as a starting point?

Depends… your diagram is somewhat vague. Vcc goes to which Arduino pin? Vcc comes from what source? What voltage? What are the IC’s?

You are right on! This applies to almost all circuits, not just Arduino circuits. Your schematic as simple as it is shows exactly what you are asking. I am assuming your diagram connects Gnd and Vcc with a bulk capacitor across the VCC power source. This helps stabilize the VCC. The reason for the decoupling capacitor is when the IC makes a logic transition (depending there could be thousands occurring concurrently both in the chip and on the board) all the nodes have capacitance. In order to make that transition the driver portion needs to sink or source current to accomplish this. This comes from VCC and Ground. We know there are no perfect conductors so there will be voltage drops because of this. The decoupling capacitor supplies the energy for this transition. As IC's get faster the demand on these capacitors grows and they need to supply more current is a shorter time frame. This is part of the reason you will see different values on different designs. The ESR (ESR is the sum of in-phase AC resistance. It includes resistance of the dielectric, plate material, electrolytic solution, and terminal leads at a particular frequency. ESR acts like a resistor in series with a capacitor (thus the name Equivalent Series Resistance).) That is why I also prefer the Vin (barrel jack) on the Arduino, it has additional capacitors. Many times I put SMD capacitors on the pins of the regulator in prototypes.

> idrisdraig:
> Does the following make sense as a starting point?
>
Yep. Looks fine. The UNO - fed by its "5V" terminal - has its own bypass capacitors so there is little point adding a local 0.1 µF but an additional 47 µF (which happens to equal the one already on the UNO 5 V line) will certainly not hurt.
For each logic IC, the 0.1 µF needs to have as short connections to the supply terminals as possible. There is however another consideration - the ground lines between the different sections need to be as short as possible with as heavy conductors as possible to minimise inductance and resistance.
And also considering the problems with inductance, all connections between sections - ground, supply and data - need to be grouped together to avoid open loops which exhibit inductance and can couple to other open loops.
On PCBs, you use "ground fill" rather than ground traces - and also fill for the supply lines if practical, so the bypass capacitor should attach directly to the ground fill rather than by a short trace, and the supply line should route to the individual bypass capacitors and from there to its adjacent IC - as the above diagram suggests. This structure will then resemble a low-pass filter from IC to IC.

Thanks.
Various bits of "theory" there that are the sort of thing I struggle with, so I may have supplementary questions when I've given more thought to power.

If I understand "ground fill" correctly, it's not an option in the short term as I'll be using strip board.
Can you recommend any useful info for noobs on layout? (Nothing I'm building at the moment will be complicated.)

The simple version is that the 47uF is a power supply filter cap designed to keep the
supply voltage stable whereas the 0.1uF (100nF) and 0.01uF (10nF) are "decoupling"
or 'bypass' caps to shunt high frequency spikes to ground.
The most important thing to remember is that the decoupling caps are only effective
if they are located as physically close to the digital ICs as possible, otherwise the
spikes that occur on the IC pins will not be bypassed because the cap is too far
away to make any difference. Typically the decoupling cap is within 5 to 10 mm of
the IC Power pin (the pin the positive supply voltage connects to). When making a
prototype on perfboard, the cap is the closest set of pads to the chip.

You ‘MUST’ stress about de-coupling capacitors !

See:

but I've also read that it's not worth getting too strssed about the detail

That's total BS !

It's all about the detail !

"The devil is in the details " ! (as Larry pointed out)

He often beats me to it. I don't know why someone doesn't market a forum ESTOP button like they use
on "La Voz" that clicks the reply button on the forum page...

raschemmel:
That's total BS !

It's all about the detail !

Can you share the details please? I was asking about details some time ago. When asking "how large" I got answer "about 100nF for every IC". For "how close is close enough?" they said "as close as possible". I have never seen more detailed analysis.

That's exactly correct.
How much more detail is possible ?
If you put the cap RIGHT NEXT TO the IC
is that not "as close as possible" ?
What part of "as close as possible did you
not understand ?

.

Well "as close as possible" means solder directly to the pins where they leave the package. Usually the decoupling caps are not so close, for convenience. How far it can be and still work?
What capacity is needed? Is 82nF enough? I think so, they were much cheaper in our local electronics shop so I bought them instead. And what about 10nF? Could even less be used?

Often the decoupling capacitors are within a few millimeters of the I.C. pins.

FYI

Well “as close as possible” means solder directly to the pins where they leave the package

I would say that’s a bit extreme. In 40 years in the industry, it has alway been acceptable to place the
cap in the next row of pads on the perf board. A difference of 5mm is not going to matter.
I have never seen anyone solder caps to the IC pins unless they ran out of real estate on the board.

For "how close is close enough?" they said "as close as possible".

These are guidelines and I suppose you could say "as close as practical". Then, if it's not close enough you might find out the hard way.

What capacity is needed? Is 82nF enough?

I'd take the manufacturer's recommendation to be the minimum recommendation, perhaps allowing for 20% tolerance parts (which could go a little lower). But, you can't use a 100uF electrolytic because electrolytic capacitors don't "act like" capacitors at high frequencies. That's why you'll sometimes see an electrolytic and ceramic in parallel when you need higher capacitance plus the characteristics of a ceramic (or foil capacitor, etc.).

These are guidelines and recommendations. I've seen boards with one or more missing bypass caps and they work fine. Since every chip is supposed to have at least one, there are usually many in parallel, and often they are fairly close to more than one IC so one or two missing isn't always a big deal.

Some chips and some applications will work without any bypass caps. But if you leave them out or use a value that's too low or otherwise don't follow the manufacturer's recommendations and your circuit doesn't work, you can't complain.

A lot of things in electronics are not critical. Part of the "trick" is understanding what the components & circuits are doing and understanding what's critical and what's not. ...If you are building something and they tell you to use a certain size nail you might get-by with a bigger or smaller one, etc.

I just don't get why if caps are in datasheet, values specified, indicated as mandatory, why are they left out of IC?

Th

“ I just don't get why if caps are in datasheet, values specified, indicated as mandatory, why are they left out of IC? ”

Because capacitors are physically big

raschemmel:
I have never seen anyone solder caps to the IC pins unless they ran out of real estate on the board.

I must show you some of my projects then! I decouple on the solder side of the board, right across the power pins. Linear regulators have the bypass cap's soldered onto the pins before they go into the board. Actually, I must get some SMD as they would be neater like that.

Now THAT I have seen (to save space).
You just ignore tge decoupling caps while building the board and when you finish the board you flip it upside down and solder ceramic 0.1 uF flat caps
across the power pins , laying down flat in the center of the underside of the IC. That's actually
a popular technique because it allows you to ignore
the thise caps when planning the board layout
plus because they're directly across the power
pins they meet the 'as close as possible' criteria.
Yeah , I've done that a couple of times in 40
years when I was tight on real estate.

I think this discussion clearly demonstrates the details are not important as stated in the OP. Or better it is so complicated that it is not worth to study the detail. You place a ceramic cap with capacity around 100nF somewhere close and hope it will be OK. It might work with smaller cap further away (or none at all) but there is not enough information to determine minimal required capacitance and maximum allowable distance.