(solved with benefits) designing relatively complex printed circuits ?

[rosemerry]

i am a student and i am about to finish my engineering studies , we were trained to design electrical circuits , make them and do all the soldering and all .
the making part does not bother .

for project i chose a computer simulating device , so the configuration is relatively complicated since it contains alot of multiplexers , latches , memory cells , a couple of processors and an atmega328 with arduino bootloader to load a mini bootup software from a permanent (so it's arduino related in some sort) .

the problem is , i re-designed this circuit twice already and i end up throwing it away and restart from scratch , i cannot simulate everything the circuit needs to do with the simulating software , i also am unable to make a primal and editable prototype on a breadboard since the processes are highly time sensitive and sensitive to noise .

when i asked my mates and professor he said that i should've not chosen a project as complex as mine , i cannot go back now and start a new project , and i also do not want to throw away 10 more circuits
before getting the design to work , as lab access for parts is not that simple .

how can i fully ensure that the next design works before actually printing the board and soldering the parts ?

[system]

when i asked my mates and professor he said that i should've not chosen a project as complex as mine

We tell OP's that all the time.

for project i chose a computer simulating device , so the configuration is relatively complicated since it contains alot of multiplexers , latches , memory cells , a couple of processors and an atmega328 with arduino bootloader to load a mini bootup software from a permanent (so it's arduino related in some sort) .

a couple of processors and an atmega328 with arduino bootloader to load a mini bootup software from a permanent

Too bad we don't know what you are talking about since you haven't posted anything for your project.

It's hard to see what the problem is without a schematic.

[rosemerry]

raschemmel:
We tell OP's that all the time. Too bad we don't know what you are talking about since you haven't posted anything for your project.

do you want to see the main design ? the parts ? or the full circuit ?
i can provide that .

[system]

i re-designed this circuit twice already and i end up throwing it away and restart from scratch , i cannot simulate everything the circuit needs to do with the simulating software , i also am unable to make a primal and editable prototype on a breadboard since the processes are highly time sensitive and sensitive to noise .

I can't address the simulating software issue since I have never really used any.
I think I can say I have built relatively complex circuits.

Do you want to see the Fritzing for that ?

[gpsmikey]

Wow - now THAT is a "rats nest"

As for building a printed circuit, the basic problem is you have too complex a system to start with, however, a couple of things if you are going ahead with the printed circuit. Make sure you have lots of 0.1 ufd bypass capacitors added to your circuit - each IC should have one across the power and ground, very close to the IC to help control noise. Laying out a board for something like that is actually quite complex and can actually involve boards with 6 or 8 (or more) layers on the board (something you are not ready to deal with, but any complex board often is not just double sided). Make sure your supply is clean and has sufficient filtering on it - one of the big killers for people is noise on the supply - if it is noisy or fluctuates with changing load, your system will not work as expected and you will spend LOTS of wasted time trying to fix it. Get the supply clean. If possible, run at a slower clock speed - the slower the clock, the slower the system runs, but it is also more tolerant of timing issues (if you look at complex high speed circuit boards, you will often see delay lines etc. put in to make the timing work correctly since you are working at RF frequencies).

Even if you are wiring the system up with wires and prototype boards (actually more so), timing and noise control is extremely important - without clean power and signals, you will get nowhere.

[system]

Just for the record , every wire has a (visible) label and it worked flawlessly on the FIRST test ( 15 minutes before the " drop dead" deadline. I worked 27 hours straight with absolutely NO breaks and made the Formal Test deadline by 15 minutes.
It was Paramount Studios Sound Stage 13 (where the first Star Trek movie was filmed. The Hollywood Fire Marshall was there at 12 Noon demanding everyone demonstrate a working equipment. If any equipment failed the test it would be promptly evicted from the building. That's how they roll in Hollywood. If it doesn't work you're OUT. Mine worked.

There are 6 rings (metal tube welded) with 16 segments of NEON in each. They are suspended by chains from the 200 foot sound stage ceiling with each at a lower level (having longer chain) than the previous.

They are wired consecutively in CW order 1,2,3,4,1,2,3,4,1,2,3,4,1,2,3,4 with all "1" s driven by same signal , all '2' driven by same signal and so forth. This allows the POV illusion of rotation by adjusting the sequence speed to adjust rotation speed, causing group A to illuminate , then group B, then C , then D, with no two groups on at the same time.
When sequenced the illusion is of a saucer approaching the landing point (the dance floor) at an angle of descent and spinning slower as it approaches. During the Grand Entrance (a Hollywood term for when the Guest Stars lead the guests into the party) Leonard Nimoy and William Shatner were at the head of the group of guests, leading them into the room with the lights running the full speed flying saucer landing effect sequence. It was quite impressive in the dark 200 foot sound stage.

The photo was taken after the guests at the party had eaten dinner (really good by the way) and were dancing on the dance floor to Waltz music from a LIVE orchestra (that's Hollywood for you) The Flying Saucer Illusion is accomplished by adjusting the spin rate of the far distance 6 foot diameter ring to FASTEST, and then the next largest ring (10.75 foot diameter ) to a slower speed, then the next largest ring (15.5 feet) to a slower speed , then the next largest (20.5 feet) to a slower speed and so forth. The result is the illusion of a flying saucer coming toward you

Each ring is 4.5 foot diameter larger than the previous.

1: 6 feet
2: 10.75 feet
3: 15.5 feet
4: 20.5 feet
5: 25 feet
6: 29.75 feet

TRIBUTE 82-B.pdf (487 KB)

TRIBUTE 82-A.pdf (463 KB)

[Noobian]

@raschemmel

Whoa, That project looks more intimidating than the rip off clock made by "Ahmed The clock boy"

[system]

Whoa, That project looks more intimidating than the rip off clock made by "Ahmed The clock boy"

It took 3 months to design. I lost my notebook so I don't know how I organized the build. It was 34 years ago so obviously I don't remember what was in the notebook but I can only guess than each of the 50 some odd circuits was on a different 8 1/2" x 11" page and I assembled them in order and tested each before assembling the next so at the end of 27 hours the last wire was simply part of the last of the 50 or so circuits and the other 49 had already been tested, and the worst case would have been circuit #50 didn't work correctly . Since all but a few of the circuits were LM555 Timer circuits they were relatively simple.
The blanking of all but one of the rings was done by controlling the sequence signals with 4016 analog switches so only one passed the control signals to it's ring at a time. Thus there were two sequencing operations occurring simultaneously. All six rings are sequencing all the time but only the control signals for one of them can pass through an analog switch at any given time because the switches are sequenced as well. The parameters are called RING SPIN RATE and RING SEQUENCE RATE.

[Southpark]

raschemmel:
It was 34 years ago

Haha! Dinosaur!! But worthy. A privilege to be somehow associated with Startrek.

As for OPs question...... start small and work upwards. Get a low to medium complexity board created....populated ...and working.

[rosemerry]

that's an amazing project raschemmel , very impressive (y) . thank you .
gpsmikey : thanks alot , problem solved .

[system]

Thank you. Was your problem solved by a simple recommendation to use ample decoupling caps ?
( and power supply filter caps) Do you mind if I ask how you got this far without knowing that ? ( don't the teach that in school ?) I have a BSEET from DeVry and they did cover the importance of that but I had 12:years hands on experience in electronics before I went back to school. ( I was 47 when I started DeVry.

FYI, boards with digital delays are generally in the "very advanced" projects category.

[rosemerry]

what he said is useful and good to know , but it's not what actually solved the problem , what solved the problem is that i found out that the problem is not in the simple circuit errors that i am making , but it's with some components , the switchers to be exact .

since you seem to have quite a valuable experience in the field maybe you can solve my main problem .
you see in my design i needed a dual port SRAM but we don't have any in the lab , so my professor recommended following what was done in the Apple II, they commanded a single port SRAM in phases of a clock . i had to make my own design :

here is the design :

white lines are 1bit lines .
blue lines are 18bit lines .
red lines are 8bit lines .
clockA is a clock source that generates a square wave of 60ns period comprised of (30ns high then 30ns low signal)
clockB is a clock source that generates a square wave of 30ns period (25ns low , 5ns high) (double the first frequency) .
now clockA is the signal that triggers which devices can command the SRAM at that time , it's fed to the MUX and switcher parts along with other discrete logic components , MUX is a chain of multiplexers that chift the addresses ADDRX and ADDRY to the ADDR port of the SRAM in every half-period that's what initially triggers the fetching then the fetching and the output of the data by the SRAM , which happens in 5ns according to the datasheet at 24*C on a printed circuit , in practice i expect that to be 10ns . (btw DEVICEX only reads from the SRAM and never writes to it , while DEVICEY both reads and writes) S-SRAM is the pin that set's weather the SRAM reads or writes , S-PORT is the rail that set's weather DEVICEY reads or writes . now the switch components are analog switcher chips since when they switch the signal to the rail that rail can both read and write (two directions) while the Multiplexer chips only allow current to flow in one direction when rails are connected (one way signal transmission) .

waveB or the signal generated by clockB serves to activate the latches and to command them to store the input in the register and to output it to the output port . by instant 25ns of every half period the SRAM would at a problability of 100% have outputted the correct data to the data bus , that's why at that instant of the half period clockB activates the latch (the latch chip is activated with a rise phase (low->high)) .

now that should explain everything . the main problem is the fact that the analog switches are too slow in practice as they mess everything up , the multiplexers and latches are fine but the switcher chips are inefficient and wasteful , they must then be replaced by other components or more efficient logic .

what do you this of the whole setup Mr Reschemmel ? how can i improve it ? and how can i replace the switches ? thank you .

[system]

I hope to god you're not trying to get this working without a timing diagram and Logic analyzer ?

Why didn't you post the timing diagram ?

This is way beyond the level of a forum post. Even if there are members with years of logic analyzer experience (and that's what this project would require), to troubleshoot it via forum posts seems near impossible.

First of all, everything you have said is only theoretical until you can post logic analyzer screenshots that show that any of those signals are what you say they are.

Second, with clock signals of 13.3 Mhz and 16.6 Mhz, I don't see how an arduino fits into any of this.

Do you have any logic analyzer screenshots ?

so the configuration is relatively complicated since it contains alot of multiplexers , latches , memory cells , a couple of processors and an atmega328 with arduino bootloader to load a mini bootup software from a permanent (so it's arduino related in some sort) .

I think your professor was right, you should have picked something less complex. Most companies would spend thousands of man hours getting something like this working reliably. I think you may have bit off more than you can chew. I know how you feel. I did the same thing for my senior project. I built a mini "mars rover" from a an RC car. I modified the suspension, added an embedded single board computer, put a metal base on it with custom pick and place robot arm with 192 tooth gear driven by a geared motor allowing +/- 90 degrees motion in the horizonal axis and +/- 45 degrees in the vertical axis with an Erector set servo driven gripper and an ultrasonic sensor and a laser range finder. In the end only the motors worked because I ran out of time before I could build the I/O interface board. There was also a wire wrapped working 68000 uprocessor base station with a wire wrapped working monochrome video circuit driving an RGB monitor with the menu displayed on the screen. I don't know what I was thinking when I thought up the idea for the project but my lab partner was too inexperienced to know any better so he went along with it thinking that if I said we could do it that we could. In the end, the presentation day was both dissapointing and pleasantly surprising because we thought we were screwed and would have to repeat the lab class but so many visitors from companies who were the judges said we couldn't win because it didn't work but they told our professor that we shouldn't get an F because we had the guts to try something really challenging while everyone else picked easy projects that were a slam dunk to pass the course. At first the professor came over and told us he was changing our F to a D, but this went on all day long and then later he came over and told us he was changing our D to a C and before the day was over he change the C to a B- . We still can't believe it but we not only passed, it didn't ruin our GPAs

I understand the professor's viewpoint. He can't just let the students pick difficult projects and change them at the last minute because they failed. It doesn't work that way in the real world and he doesn't want his students to think they can get away with making poor decisions.
You know what they say"

"Good decisions come from experience. Experience comes from making bad decisions..."

now that should explain everything . the main problem is the fact that the analog switches are too slow in practice as they mess everything up , the multiplexers and latches are fine but the switcher chips are inefficient and wasteful , they must then be replaced by other components or more efficient logic .

what do you this of the whole setup Mr Reschemmel ? how can i improve it ? and how can i replace the switches ?

Part numbers ? (WHAT analog switches ?)

It's hard to comment because I don't know the part numbers and I don't know how committed you are to this design. Can't you slow everything down ?

[rosemerry]

the reason i actually started this project , is because i am the only girl in the lab .. and the boys and professor always underrate me even though i know that i am better than the boys , that's mainly why i decided to pick this project , in fact that's why i put my identity as "male" when i go on engineering forums .
i am sorry for wasting your time Mr Reschemmel , i will do some more research on this and then continue , i am not letting this go though .. in the mean time do you know any logic configurations
or any chip that can simulate the needed tasks of those switchers ? thank you .

[system]

You haven't answered some critical questions about timing diagrams and logic analyzers and analog switch part numbers. In addition you haven't posted a schematic. What is the function of the analog switches in a digital circuit ? I guess I'm at a loss to understand why you are only now learning that the switches are too slow. Am I to understand that you never did a "Feasibility Study" ?
(Electrical Engineering 101)

[anon57585045]

For bus interfaces you should be using something like a bidirectional data buffer like a 74HC245, not analog switches.

By the way, when I started work, none of the engineers had logic analyzers or simulation software. You had to just read and understand the component specs, usually do timing diagrams, and then build and test. There was little room for guessing. Those were the days.

[dlloyd]

This type of circuit is best suited for a CPLD (very fast and very inexpensive) or small FPGA. I've used XILINX in the past ... they have great software but the learning curve is quite steep. Hardware Description Language (VHDL) is what's mostly used to program these ... some complex circuits can be described in a few lines of code but it's another steep learning curve.

This site has a great tutorial on learning FPGA design and they even have SDRAM controller examples. Somewhere on the site in the past I came across a dual port ram example (not sure where it is now though).

EDIT: With a small development board like this you can re-program it as many times as you like until your logic design works as expected.

[rosemerry]

dlloyd : thank you very much for the idea , i was thinking about using similar structures for simulation purposes (y) thank you for the valuable links , i really appreciate it .

aarg : thank thank thank you , that's exactly what i was looking for .

Mr Raschemmel : thank you for your assistance sir , i really appreciate it . i will take what you said into account you really helped me , you really remind me of my professor for some reason , he's always like didn't you take that on your first year ? didn't you get that on preparation .. etc .
he once came to me as i was struggling with something and said , maybe you should've been a nurse after all ... i mean who does that ... anyway i hope i didn't waste your time in anyway .

[jremington]

i am the only girl in the lab .. and the boys and professor always underrate me even though i know that i am better than the boys

rosemerry: you might enjoy reading Eileen Pollack's "The Only Woman in the Room" - one of the first two females to graduate from Yale in physics. She describes experiences similar to yours. https://www.amazon.com/Only-Woman-Room-Science-Still-ebook/dp/B00RKQ6268#nav-subnav

Certainly, men in technical fields could benefit from reading it (I certainly did), because sadly, things have not changed much since her time.

Good luck, stick with it and perhaps you can help make a change!

[rosemerry]

jremington:
rosemerry: you might enjoy reading Eileen Pollack's "The Only Woman in the Room" - one of the first two females to graduate from Yale in physics. She describes experiences similar to yours. https://www.amazon.com/Only-Woman-Room-Science-Still-ebook/dp/B00RKQ6268#nav-subnav

Certainly, men in technical fields could benefit from reading it (I certainly did), because sadly, things have not changed much since her time.

Good luck, stick with it and perhaps you can help make a change!

thank you veeeery veeery much Sir i really appreciate what you said .